1. Field of the Invention
The present general inventive concept relates to a semiconductor device and a method of fabricating the semiconductor device, and more particularly, to a semiconductor device including a through silicon via hole formed in a wafer level package and a method of fabricating the semiconductor device.
2. Description of the Related Art
The higher the integration of a semiconductor device, the greater a small defect of an element for forming the semiconductor device adversely affects an overall performance of the semiconductor device. For example, the higher the integration of a semiconductor device, the greater an aspect ratio of a through silicon via hole formed in a wafer level package, and thus there is a high possibility that a void may occur when filling a conductive material in the through silicon via hole. The void may adversely affect the overall performance of the semiconductor device.
Further, an attempt to reduce manufacturing costs of the semiconductor device currently an important goal in order to achieve quality competitiveness. For example, attempts to reduce the manufacturing costs of the semiconductor device have currently been made in the forming of the through silicon via holes formed in the wafer level package.